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ARM Process state -- CPSR

2025/6/18 18:08:18 来源:https://blog.csdn.net/xiaozhiwise/article/details/142658204  浏览:    关键词:ARM Process state -- CPSR

Holds PE status and control information.
保存PE状态和控制信息。

N, bit [31]
    Negative condition flag. Set to bit[31] of the result of the last flag-setting instruction. If the result is regarded as a two's complement signed integer, then N is set to 1 if the result was negative, and N is set to 0 if the result was positive or zero.

    负条件标志。设置为最后一个标志设置指令结果的第[31]位。如果结果被视为2的补码有符号整数,则如果结果为负,则N设置为1,如果结果为正或零,则N设为0。

Z, bit [30]
    Zero condition flag. Set to 1 if the result of the last flag-setting instruction was zero, and to 0 otherwise. A result of zero often indicates an equal result from a comparison.

    零条件标志。如果最后一个标志设置指令的结果为零,则设置为1,否则设置为0。结果为零通常表示比较结果相等。

C, bit [29]
    Carry condition flag. Set to 1 if the last flag-setting instruction resulted in a carry condition, for example an unsigned overflow on an addition.

    携带状态标志。如果最后一个标志设置指令导致进位条件,例如加法时的无符号溢出,则设置为1。

V, bit [28]
    Overflow condition flag. Set to 1 if the last flag-setting instruction resulted in an overflow condition, for example a signed overflow on an addition.

    溢出状态标志。如果最后一个标志设置指令导致溢出情况,例如加法时的有符号溢出,则设置为1。

Q, bit [27]
    Cumulative saturation bit. Set to 1 to indicate that overflow or saturation occurred in some instructions.

    累积饱和位。设置为1表示某些指令中发生了溢出或饱和。


GE, bits [19:16]
    Greater than or Equal flags, for parallel addition and subtraction.
    
    大于或等于标志,用于并行加法和减法。


E, bit [9]  
    Endianness state bit. Controls the load and store endianness for data accesses:
    0b0  Little-endian operation
    0b1  Big-endian operation.

    端序状态位。控制数据访问的加载和存储端序


A, bit [8]
    SError interrupt mask bit. The possible values of this bit are:
    0b0  Exception not masked.
    0b1  Exception masked.

I, bit [7]
    IRQ mask bit. The possible values of this bit are:
    0b0  Exception not masked.
    0b1  Exception masked.

F, bit [6]
    FIQ mask bit. The possible values of this bit are:
    0b0  Exception not masked.
    0b1  Exception masked.


M, bits [3:0]
    Current PE mode. Possible values are:
    0b0000  User.
    0b0001  FIQ.
    0b0010  IRQ.
    0b0011  Supervisor.
    0b0110  Monitor.
    0b0111  Abort.
    0b1010  Hyp.
    0b1011  Undefined.
    0b1111  System.

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